With native support for floating point in the new variable-precision digital signal processing (DSP) blocks, floating-point operations can run at the frequency of the DSP blocks, delivering significantly higher performance. Improved floating-point performance: Past floating-point implementations were limited in performance due to timing bottlenecks by additional logic and routing resources required to implement floating-point operators.The productivity advantages of not having to convert to fixed-point design are further amplified as you iterate your design. Shortened development time: Using FPGAs with native floating-point operators eliminates the need to convert your floating-point designs to fixed-point designs, overcoming an already challenging and lengthy task.In floating-point mode, each DSP block provides a single-precision multiplier and single-precision adder enabling DSP designers with the following key benefits:
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